Silicon photonics and CPO could solve AI factory data bottlenecks

Professor Kim Yeong-hyeon of Hanyang University ERICA proposed silicon photonics and Co-Packaged Optics to overcome data transmission limits in AI Factories. Meta's recent evaluation at the 2025 European Conference on Optical Communication showed that CPO can reduce optical connection power consumption by approximately 65% compared to existing pluggable methods.

In the era of AI, semiconductor competitiveness is no longer limited to the calculation speed of individual computing chips. A key variable determining the performance of an entire AI Factory has emerged: where data is located, what paths it takes, and how it arrives without delay. Even if the computing power of a GPU is exceptional, the entire system falls into a waiting state if the pathways transporting data become congested.

Kim Yeong-hyeon, a professor in the Department of Next-Generation Semiconductor Convergence Engineering at Hanyang University ERICA, pointed to data bottlenecks in AI Factories and proposed silicon photonics and Co-Packaged Optics (CPO) as next-generation technologies to resolve them. The analysis suggests that even as the number of GPUs increases, AI performance does not rise as expected because of the "road width" issue, namely data transmission efficiency.

The limits of copper wiring and silicon photonics as a "light highway"

Until now, connections between semiconductors have relied primarily on electrical signal transmission through copper wiring. While copper is efficient for transmitting signals over short distances, critical weaknesses emerge as data transmission speeds increase and distances grow longer. This is because electrical signals weaken or cause interference as they pass through copper lines. To compensate for this, repeaters must be used to amplify signals, a process that consumes additional power and intensifies heat generation.

To reduce this power and heat burden, optical connection technology is gaining attention. Through Wavelength Division Multiplexing (WDM) technology, which allows different wavelengths of light to be sent simultaneously via optical fibers, transmission capacity can be dramatically increased. Silicon photonics is a technology that implements such optical techniques on small semiconductor chips. Utilizing semiconductor fine processes, it creates "optical waveguides"—paths for light—inside the chip and integrates modulators that convert electrical data into light, as well as photodetectors that read light as electrical signals.

However, since silicon has characteristics that make it disadvantageous for generating light directly, efficiency is improved by combining it with External Laser Source (ELS) methods using compound semiconductors such as Indium Phosphide (InP). This is also advantageous for maintenance, as it allows the heat-generating electronic chips and the lasers to be placed separately.

CPO technology placing optical engines right next to switch chips

As optical connection technology expands from long-distance data center segments to short segments inside chips, CPO (Co-Packaged Optics) is emerging as a core technology. Previously, switch chips (ASICs) and optical modules were separated, requiring electrical signals to travel along the substrate; however, CPO places the optical engine right next to the switch chip on a single package substrate.

This is akin to moving a factory and a logistics terminal to the same site to minimize travel distance. By shortening the distance electrical signals travel, signal quality improves, and the power consumption used to compensate for high-speed electrical signals can be significantly reduced. Consequently, the bandwidth density increases, allowing more data to be processed within a limited area.

Global big tech companies are already accelerating the commercialization of this technology. Meta revealed the results of its CPO switch system evaluation at the 2025 European Conference on Optical Communication (ECOC). According to Meta's test results, the optical connection power consumption of the CPO method was approximately 65% lower than the existing pluggable method, and connection stability through long-term operation was also confirmed.

The combination of HBM and CPO: A hybrid structure completing the AI Factory

CPO plays a different but complementary role to High Bandwidth Memory (HBM), which supplies data right next to the GPU. While HBM supplies data through wide electrical pathways at very close distances to the GPU, CPO maximizes the efficiency of the network segments connecting multiple GPU systems. No matter how fast HBM is, if the communication network between GPUs is blocked, overall performance will inevitably degrade.

Future AI systems are expected to evolve toward using various optical connection methods in a mixed manner depending on performance and power efficiency. Representative examples include Linear Pluggable Optics (LPO), which saves power by omitting Digital Signal Processing (DSP) units, and Near-Packaged Optics (NPO), which places optical engines near the chip.

Ultimately, future AI competitiveness depends not on the calculation speed of a single GPU, but on how closely the GPU, memory (HBM), and network (CPO) are combined to create a "data flow without waiting." Professor Kim Yeong-hyeon emphasized that the most powerful AI Factory is one with a structure where numerous GPUs and memories work together without waiting for one another.

Source: news.skhynix.co.kr